Available to hire
I am an Electronic Engineer specialized in Embedded Systems, with broad cross-disciplinary skills across electronics. I started as a hardware designer, but I found my stride in software development. Curiosity and a constant drive to learn have taken me through many different sectors.
I enjoy working at the intersection of hardware and software, tackling challenges from motor control to user interfaces. I thrive in diverse teams and am always ready to pick up new tools and languages to deliver robust, maintainable solutions.
Language
English
Fluent
Spanish; Castilian
Advanced
French
Beginner
German
Beginner
Work Experience
Software Developer at Danieli Automation
October 1, 2025 - October 23, 2025Industrial PLC programming and EtherCAT fieldbus integration; probation period not concluded with positive outcome due to lack of mutual interest.
Technical Software Engineer at Rehab Technologies, Istituto Italiano di Tecnologia
July 1, 2025 - October 23, 2025Firmware and software development for a robotic rehabilitation team operating two exoskeletons (Float for upper limbs, Twin for lower limbs). Responsibilities include motor control, GUI interfaces, integration into the software architecture, installation and maintenance of multi-computer systems, and mentorship of new software engineers.
Software Developer for Ultrasound at Esaote
January 31, 2022 - October 23, 2025Software development for ultrasound equipment (C/C++/C#). Analyzed presets, data structures, file handling, versioning, and modification of code segments within the monolithic architecture and XML (XSD) schemas.
Software Engineer – Linux port to ARM at Hitachi Rail STS
July 1, 2020 - October 23, 2025Studied porting of a custom Linux OS onto an ARM processor under an hypervisor (XtratuM) with the goal of running multiple isolated OS instances on a single processor.
Junior Firmware Developer – DSP Core at Leonardo Spa
February 28, 2020 - October 23, 2025Firmware development for TI C6713 DSP cores. Tasks included C/C++ foundations, understanding the board, memory interface (EMIF), implementing a Read/Write/Erase library for external Flash, adapting an Ethernet Altera/Intel driver, and integrating with Avalon/FPGA MAX10 bridges; versioned with Git.
Education
Master's Degree in Neurotechnology (Laurea Magistrale) at Aarhus University, Denmark
September 1, 2017 - March 1, 2018Periodo di Formazione C: memory management modules at Periodo di Formazione C
December 1, 2018 - January 25, 2019Railway Signaling Course (Cenelec EN50126/50128/50129) – ERTMS/ETCS at Cenelec / Railway Signaling Course
September 1, 2018 - November 1, 2018Qualifications
Railway Signaling Course (Cenelec EN50126/50128/50129) – ERTMS/ETCS
September 1, 2018 - November 1, 2018Periodo di Formazione C: memory management and dynamic allocation modules
December 1, 2018 - January 25, 2019Industry Experience
Healthcare, Manufacturing, Software & Internet, Professional Services, Other
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