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Hi, I’m Hamza Ali Morsi Abdelrehim—a graduate engineer with a passion for digital IC design, FPGA development, wireless systems, and computer architecture. I’m currently pursuing a Master’s in Computer Engineering with a focus on wireless technologies, and I enjoy turning complex ideas into efficient, high-performance hardware and software solutions. Through hands-on projects and leadership roles, I’ve gained experience across RTL design, ASIC flows, and system-level integration, with a strong emphasis on RISC-V architectures and collaborative problem-solving. I’m eager to contribute to challenging technical initiatives and continue growing my expertise in digital design and communication systems.…Hi, I’m Hamza Ali Morsi Abdelrehim—a graduate engineer with a passion for digital IC design, FPGA development, wireless systems, and computer architecture. I’m currently pursuing a Master’s in Computer Engineering with a focus on wireless technologies, and I enjoy turning complex ideas into efficient, high-performance hardware and software solutions. Through hands-on projects and leadership roles, I’ve gained experience across RTL design, ASIC flows, and system-level integration, with a strong emphasis on RISC-V architectures and collaborative problem-solving. I’m eager to contribute to challenging technical initiatives and continue growing my expertise in digital design and communication systems.

Hamza Ali Morsi Abdelrehim

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Hi, I’m Hamza Ali Morsi Abdelrehim—a graduate engineer with a passion for digital IC design, FPGA development, wireless systems, and computer architecture. I’m currently pursuing a Master’s in Computer Engineering with a focus on wireless technologies, and I enjoy turning complex ideas into efficient, high-performance hardware and software solutions. Through hands-on projects and leadership roles, I’ve gained experience across RTL design, ASIC flows, and system-level integration, with a strong emphasis on RISC-V architectures and collaborative problem-solving. I’m eager to contribute to challenging technical initiatives and continue growing my expertise in digital design and communication systems.…Hi, I’m Hamza Ali Morsi Abdelrehim—a graduate engineer with a passion for digital IC design, FPGA development, wireless systems, and computer architecture. I’m currently pursuing a Master’s in Computer Engineering with a focus on wireless technologies, and I enjoy turning complex ideas into efficient, high-performance hardware and software solutions. Through hands-on projects and leadership roles, I’ve gained experience across RTL design, ASIC flows, and system-level integration, with a strong emphasis on RISC-V architectures and collaborative problem-solving. I’m eager to contribute to challenging technical initiatives and continue growing my expertise in digital design and communication systems.

Available to hire

Hi, I’m Hamza Ali Morsi Abdelrehim—a graduate engineer with a passion for digital IC design, FPGA development, wireless systems, and computer architecture. I’m currently pursuing a Master’s in Computer Engineering with a focus on wireless technologies, and I enjoy turning complex ideas into efficient, high-performance hardware and software solutions.

Through hands-on projects and leadership roles, I’ve gained experience across RTL design, ASIC flows, and system-level integration, with a strong emphasis on RISC-V architectures and collaborative problem-solving. I’m eager to contribute to challenging technical initiatives and continue growing my expertise in digital design and communication systems.

Skills

Python

VHDL

TCL

Experience Level

Python

Expert

VHDL

Expert

TCL

Intermediate

Language

Arabic

Fluent

English

Advanced

Work Experience

Digital IC Design Trainee at Digital IC Design Diploma Program

August 1, 2024 - August 1, 2024

Completed RTL-to-GDS ASIC design training covering the full digital design flow, including self-checking RTL testbenches, TCL synthesis constraints, low-power techniques (clock gating, multi-clock domains, clock-domain crossing), static timing analysis, DFT insertion, formal verification, and post-layout verification. Final project delivered a low-power multi-clock digital system with ALU, register file, UART, FIFO, clock divider/gating, and a controller with verified GDS-II bitstream.

Digital IC Design Workshop Participant at IEEE ASUSB

April 1, 2025 - April 1, 2025

Designed Verilog-based VGA and UART circuits with UVM methodology and SystemVerilog Assertions; applied functional coverage and constrained randomization using Questa, Verdi, and ModelSim; delivered FPGA-verified designs with thorough verification.

Communication Engineer Trainee at NANSC

September 1, 2022 - September 1, 2022

Completed training in VHF/HF voice systems, RADAR, navigation aids, satellite, and fiber optic technologies; contributed to operational aviation communication infrastructure supporting safety and coordination.