Hi, I’m Darren Harris, an embedded engineer with deep experience in ASIC hardware, SoC architectures, high-speed interfaces, and Linux environments. I’ve led hardware validation and guided cross-functional hardware, firmware, and software teams through bring-up and final system-level validation for video codec IP and display processors. In my spare time I explore AI-generated video projects, building and editing sequences with FFmpeg and DaVinci Resolve to evaluate quality and pipeline trade-offs.

Darren Harris

Hi, I’m Darren Harris, an embedded engineer with deep experience in ASIC hardware, SoC architectures, high-speed interfaces, and Linux environments. I’ve led hardware validation and guided cross-functional hardware, firmware, and software teams through bring-up and final system-level validation for video codec IP and display processors. In my spare time I explore AI-generated video projects, building and editing sequences with FFmpeg and DaVinci Resolve to evaluate quality and pipeline trade-offs.

Available to hire

Hi, I’m Darren Harris, an embedded engineer with deep experience in ASIC hardware, SoC architectures, high-speed interfaces, and Linux environments.

I’ve led hardware validation and guided cross-functional hardware, firmware, and software teams through bring-up and final system-level validation for video codec IP and display processors. In my spare time I explore AI-generated video projects, building and editing sequences with FFmpeg and DaVinci Resolve to evaluate quality and pipeline trade-offs.

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Experience Level

Expert
Expert
Expert
Expert
Expert

Language

English
Fluent

Work Experience

Self-directed work in AI-generated video
December 1, 2014 - Present
Self-directed work in AI-generated video: producing and editing longer video sequences with FFmpeg and DaVinci Resolve (self-taught), leveraging VCN/codec background to assess quality and pipeline trade-offs.
Senior Member of Technical Staff (SMTS), VCN IP at Advanced Micro Devices
August 1, 2020 - November 1, 2024
Led validation and silicon debug for AMD’s video compression IP (VCN) integrated in GPUs. Developed Python automated testing that improved coverage, debug efficiency, and performance analysis. Coordinated system-level hangs & root-cause analysis with firmware, hardware and Windows KMD teams. Maintained and updated test plans for VCN IP core, ensuring alignment with device logic and firmware.
Senior Staff Engineer, WiGig Validation at Peraso Technologies
January 1, 2015 - December 1, 2020
Built a Linux-based test automation framework (in C) from the ground up, improving validation throughput. Led a team of developers creating and executing tests for post-silicon validation / debug of 802.11ad chipsets. Worked across RTL design, firmware, and silicon teams to debug critical memory and interface-level issues.
Applications / Pre-sales Engineer at Magnum Semiconductor
January 1, 2012 - December 31, 2014
Created and validated Linux-based scripting (Perl) to program decode/encode/transcode flows in ASICs. Conducted final QA and firmware validation for customer-specific feature sets and performance metrics. Engaged directly with prospective clients to demo platform capabilities and tailor test tools to customer needs.

Education

Bachelor of Mathematics, Computer Science at University of Waterloo
January 11, 2030 - May 25, 2026

Qualifications

Private Pilot license
January 11, 2030 - May 25, 2026
RCM Grade 10 Classical Piano certification
January 11, 2030 - May 25, 2026
Master Scuba Diver PADI certification
January 11, 2030 - May 25, 2026

Industry Experience

Software & Internet, Manufacturing, Media & Entertainment, Professional Services