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Technion Electrical Engineering student with hands-on experience building deep-learning systems in PyTorch and delivering efficient, performance-oriented AI infrastructure. Skilled in implementing model training pipelines, optimizing GPU/CUDA workflows, and integrating ML components into research-focused engineering projects. Focused on efficient model implementation, downstream decision-oriented model behavior, and robust systems design. Strong foundation in ML/Deep Learning coursework and practical GPU-accelerated image processing, with interests spanning Object Detection (YOLO), optimization, and scalable compute-oriented AI development.…Technion Electrical Engineering student with hands-on experience building deep-learning systems in PyTorch and delivering efficient, performance-oriented AI infrastructure. Skilled in implementing model training pipelines, optimizing GPU/CUDA workflows, and integrating ML components into research-focused engineering projects. Focused on efficient model implementation, downstream decision-oriented model behavior, and robust systems design. Strong foundation in ML/Deep Learning coursework and practical GPU-accelerated image processing, with interests spanning Object Detection (YOLO), optimization, and scalable compute-oriented AI development.

Guy Vinitzky

AI Engineer, Data Scientist, Software Engineer, +2

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Technion Electrical Engineering student with hands-on experience building deep-learning systems in PyTorch and delivering efficient, performance-oriented AI infrastructure. Skilled in implementing model training pipelines, optimizing GPU/CUDA workflows, and integrating ML components into research-focused engineering projects. Focused on efficient model implementation, downstream decision-oriented model behavior, and robust systems design. Strong foundation in ML/Deep Learning coursework and practical GPU-accelerated image processing, with interests spanning Object Detection (YOLO), optimization, and scalable compute-oriented AI development.…Technion Electrical Engineering student with hands-on experience building deep-learning systems in PyTorch and delivering efficient, performance-oriented AI infrastructure. Skilled in implementing model training pipelines, optimizing GPU/CUDA workflows, and integrating ML components into research-focused engineering projects. Focused on efficient model implementation, downstream decision-oriented model behavior, and robust systems design. Strong foundation in ML/Deep Learning coursework and practical GPU-accelerated image processing, with interests spanning Object Detection (YOLO), optimization, and scalable compute-oriented AI development.

Available to hire

Technion Electrical Engineering student with hands-on experience building deep-learning systems in PyTorch and delivering efficient, performance-oriented AI infrastructure. Skilled in implementing model training pipelines, optimizing GPU/CUDA workflows, and integrating ML components into research-focused engineering projects.

Focused on efficient model implementation, downstream decision-oriented model behavior, and robust systems design. Strong foundation in ML/Deep Learning coursework and practical GPU-accelerated image processing, with interests spanning Object Detection (YOLO), optimization, and scalable compute-oriented AI development.

Skills

Experience Level

Expert

Expert

Expert

Expert

Expert

Work Experience

YOLOFin V3 (Two-stage deep-learning pipeline)

January 1, 2024 - December 31, 2024

Built a two-stage deep-learning pipeline using 10 YOLO base models across five representations with a custom 1D CNN meta-model. Designed chronology-aware preprocessing using time windows to reduce look-ahead bias. Developed a downstream evaluation workflow focused on decision-oriented model behavior. Implemented the full training and evaluation pipeline in Python for performance and reproducibility.

GPU-Accelerated Image Processing (Project)

January 1, 2024 - December 31, 2024

Implemented adaptive histogram equalization using CUDA kernels for histogram computation, prefix-sum style scan, and bilinear interpolation. Optimized host-to-device and compute overlap using shared memory, tile-based processing, CUDA Streams, and queue-based asynchronous coordination. Explored RDMA-oriented data movement using pinned host memory and networking primitives to reduce transfer overhead, improving throughput for image-processing workloads.